source: trunk/package/mac80211/patches/546-ath9k_cleanup_ar9287_settings.patch @ 27562

Last change on this file since 27562 was 27562, checked in by nbd, 5 years ago

ath9k: add more fixes for half/quarter rate support

File size: 2.6 KB
  • drivers/net/wireless/ath/ath9k/ar9002_hw.c

    a b void ar9002_hw_enable_async_fifo(struct  
    499499        } 
    500500} 
    501501 
    502 /* 
    503  * If Async FIFO is enabled, the following counters change as MAC now runs 
    504  * at 117 Mhz instead of 88/44MHz when async FIFO is disabled. 
    505  * 
    506  * The values below tested for ht40 2 chain. 
    507  * Overwrite the delay/timeouts initialized in process ini. 
    508  */ 
    509 void ar9002_hw_update_async_fifo(struct ath_hw *ah) 
    510 { 
    511         if (AR_SREV_9287_13_OR_LATER(ah)) { 
    512                 REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 
    513                           AR_D_GBL_IFS_SIFS_ASYNC_FIFO_DUR); 
    514                 REG_WRITE(ah, AR_D_GBL_IFS_SLOT, 
    515                           AR_D_GBL_IFS_SLOT_ASYNC_FIFO_DUR); 
    516                 REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 
    517                           AR_D_GBL_IFS_EIFS_ASYNC_FIFO_DUR); 
    518  
    519                 REG_WRITE(ah, AR_TIME_OUT, AR_TIME_OUT_ACK_CTS_ASYNC_FIFO_DUR); 
    520                 REG_WRITE(ah, AR_USEC, AR_USEC_ASYNC_FIFO_DUR); 
    521  
    522                 REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER, 
    523                             AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768); 
    524                 REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN, 
    525                               AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL); 
    526         } 
    527 } 
    528  
    529 /* 
    530  * We don't enable WEP aggregation on mac80211 but we keep this 
    531  * around for HAL unification purposes. 
    532  */ 
    533 void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah) 
    534 { 
    535         if (AR_SREV_9287_13_OR_LATER(ah)) { 
    536                 REG_SET_BIT(ah, AR_PCU_MISC_MODE2, 
    537                             AR_PCU_MISC_MODE2_ENABLE_AGGWEP); 
    538         } 
    539 } 
    540  
    541502/* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */ 
    542503void ar9002_hw_attach_ops(struct ath_hw *ah) 
    543504{ 
  • drivers/net/wireless/ath/ath9k/hw.c

    a b int ath9k_hw_reset(struct ath_hw *ah, st 
    16331633 
    16341634        ath9k_hw_init_global_settings(ah); 
    16351635 
    1636         if (!AR_SREV_9300_20_OR_LATER(ah)) { 
    1637                 ar9002_hw_update_async_fifo(ah); 
    1638                 ar9002_hw_enable_wep_aggregation(ah); 
     1636        if (AR_SREV_9287(ah) && AR_SREV_9287_13_OR_LATER(ah)) { 
     1637                REG_SET_BIT(ah, AR_MAC_PCU_LOGIC_ANALYZER, 
     1638                            AR_MAC_PCU_LOGIC_ANALYZER_DISBUG20768); 
     1639                REG_RMW_FIELD(ah, AR_AHB_MODE, AR_AHB_CUSTOM_BURST_EN, 
     1640                              AR_AHB_CUSTOM_BURST_ASYNC_FIFO_VAL); 
     1641                REG_SET_BIT(ah, AR_PCU_MISC_MODE2, 
     1642                            AR_PCU_MISC_MODE2_ENABLE_AGGWEP); 
    16391643        } 
    16401644 
    16411645        REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM); 
  • drivers/net/wireless/ath/ath9k/hw.h

    a b void ath9k_hw_get_delta_slope_vals(struc 
    984984void ar9002_hw_cck_chan14_spread(struct ath_hw *ah); 
    985985int ar9002_hw_rf_claim(struct ath_hw *ah); 
    986986void ar9002_hw_enable_async_fifo(struct ath_hw *ah); 
    987 void ar9002_hw_update_async_fifo(struct ath_hw *ah); 
    988 void ar9002_hw_enable_wep_aggregation(struct ath_hw *ah); 
    989987 
    990988/* 
    991989 * Code specific to AR9003, we stuff these here to avoid callbacks 
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