source: trunk/target/linux/ar71xx/patches-3.3/130-MIPS-ath79-add-WMAC-registration-code-for-AR934X.patch @ 30410

Last change on this file since 30410 was 30410, checked in by juhosg, 4 years ago

ar71xx: add preliminary support for 3.3

File size: 3.5 KB
  • arch/mips/ath79/Kconfig

    From 58b69cf52387a7351ec13b52d3d6a495fe611c29 Mon Sep 17 00:00:00 2001
    From: Gabor Juhos <juhosg@openwrt.org>
    Date: Fri, 9 Dec 2011 22:07:23 +0100
    Subject: [PATCH 30/35] MIPS: ath79: add WMAC registration code for AR934X
    
    Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
    Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
    ---
     arch/mips/ath79/Kconfig                        |    2 +-
     arch/mips/ath79/dev-wmac.c                     |   30 ++++++++++++++++++++++-
     arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    3 ++
     3 files changed, 32 insertions(+), 3 deletions(-)
    
    a b config ATH79_DEV_USB 
    8686        def_bool n 
    8787 
    8888config ATH79_DEV_WMAC 
    89         depends on (SOC_AR913X || SOC_AR933X) 
     89        depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X) 
    9090        def_bool n 
    9191 
    9292endif 
  • arch/mips/ath79/dev-wmac.c

    a b  
    11/* 
    22 *  Atheros AR913X/AR933X SoC built-in WMAC device support 
    33 * 
     4 *  Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> 
    45 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 
    56 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 
    67 * 
     8 *  Parts of this file are based on Atheros 2.6.15/2.6.31 BSP 
     9 * 
    710 *  This program is free software; you can redistribute it and/or modify it 
    811 *  under the terms of the GNU General Public License version 2 as published 
    912 *  by the Free Software Foundation. 
    static struct resource ath79_wmac_resour 
    2629                /* .start and .end fields are filled dynamically */ 
    2730                .flags  = IORESOURCE_MEM, 
    2831        }, { 
    29                 .start  = ATH79_CPU_IRQ_IP2, 
    30                 .end    = ATH79_CPU_IRQ_IP2, 
     32                /* .start and .end fields are filled dynamically */ 
    3133                .flags  = IORESOURCE_IRQ, 
    3234        }, 
    3335}; 
    static void __init ar913x_wmac_setup(voi 
    5355 
    5456        ath79_wmac_resources[0].start = AR913X_WMAC_BASE; 
    5557        ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; 
     58        ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; 
     59        ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; 
    5660} 
    5761 
    5862 
    static void __init ar933x_wmac_setup(voi 
    7983 
    8084        ath79_wmac_resources[0].start = AR933X_WMAC_BASE; 
    8185        ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; 
     86        ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; 
     87        ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; 
    8288 
    8389        t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); 
    8490        if (t & AR933X_BOOTSTRAP_REF_CLK_40) 
    static void __init ar933x_wmac_setup(voi 
    9298        ath79_wmac_data.external_reset = ar933x_wmac_reset; 
    9399} 
    94100 
     101static void ar934x_wmac_setup(void) 
     102{ 
     103        u32 t; 
     104 
     105        ath79_wmac_device.name = "ar934x_wmac"; 
     106 
     107        ath79_wmac_resources[0].start = AR934X_WMAC_BASE; 
     108        ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; 
     109        ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); 
     110        ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); 
     111 
     112        t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); 
     113        if (t & AR934X_BOOTSTRAP_REF_CLK_40) 
     114                ath79_wmac_data.is_clk_25mhz = false; 
     115        else 
     116                ath79_wmac_data.is_clk_25mhz = true; 
     117} 
     118 
    95119void __init ath79_register_wmac(u8 *cal_data) 
    96120{ 
    97121        if (soc_is_ar913x()) 
    98122                ar913x_wmac_setup(); 
    99123        else if (soc_is_ar933x()) 
    100124                ar933x_wmac_setup(); 
     125        else if (soc_is_ar934x()) 
     126                ar934x_wmac_setup(); 
    101127        else 
    102128                BUG(); 
    103129 
  • arch/mips/include/asm/mach-ath79/ar71xx_regs.h

    a b  
    6161#define AR933X_EHCI_BASE        0x1b000000 
    6262#define AR933X_EHCI_SIZE        0x1000 
    6363 
     64#define AR934X_WMAC_BASE        (AR71XX_APB_BASE + 0x00100000) 
     65#define AR934X_WMAC_SIZE        0x20000 
     66 
    6467/* 
    6568 * DDR_CTRL block 
    6669 */ 
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