source: trunk/target/linux/ar71xx/patches-3.3/134-MIPS-ath79-add-initial-support-for-the-Atheros-DB120.patch @ 30410

Last change on this file since 30410 was 30410, checked in by juhosg, 4 years ago

ar71xx: add preliminary support for 3.3

File size: 6.6 KB
  • arch/mips/ath79/Kconfig

    From a01e8727327cf0fb6382ca8700a3a3f73d93202a Mon Sep 17 00:00:00 2001
    From: Gabor Juhos <juhosg@openwrt.org>
    Date: Fri, 9 Dec 2011 22:23:02 +0100
    Subject: [PATCH 34/35] MIPS: ath79: add initial support for the Atheros DB120 board
    
    Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
    Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
    ---
     arch/mips/ath79/Kconfig      |   12 +++
     arch/mips/ath79/Makefile     |    1 +
     arch/mips/ath79/mach-db120.c |  155 ++++++++++++++++++++++++++++++++++++++++++
     arch/mips/ath79/machtypes.h  |    1 +
     4 files changed, 169 insertions(+), 0 deletions(-)
     create mode 100644 arch/mips/ath79/mach-db120.c
    
    a b config ATH79_MACH_AP81 
    2626          Say 'Y' here if you want your kernel to support the 
    2727          Atheros AP81 reference board. 
    2828 
     29config ATH79_MACH_DB120 
     30        bool "Atheros DB120 reference board" 
     31        select SOC_AR934X 
     32        select ATH79_DEV_GPIO_BUTTONS 
     33        select ATH79_DEV_LEDS_GPIO 
     34        select ATH79_DEV_SPI 
     35        select ATH79_DEV_USB 
     36        select ATH79_DEV_WMAC 
     37        help 
     38          Say 'Y' here if you want your kernel to support the 
     39          Atheros DB120 reference board. 
     40 
    2941config ATH79_MACH_PB44 
    3042        bool "Atheros PB44 reference board" 
    3143        select SOC_AR71XX 
  • arch/mips/ath79/Makefile

    a b obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma 
    2828# 
    2929obj-$(CONFIG_ATH79_MACH_AP121)          += mach-ap121.o 
    3030obj-$(CONFIG_ATH79_MACH_AP81)           += mach-ap81.o 
     31obj-$(CONFIG_ATH79_MACH_DB120)          += mach-db120.o 
    3132obj-$(CONFIG_ATH79_MACH_PB44)           += mach-pb44.o 
    3233obj-$(CONFIG_ATH79_MACH_UBNT_XM)        += mach-ubnt-xm.o 
  • new file arch/mips/ath79/mach-db120.c

    - +  
     1/* 
     2 * Atheros DB120 reference board support 
     3 * 
     4 * Copyright (c) 2011 Qualcomm Atheros 
     5 * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org> 
     6 * 
     7 * All rights reserved. 
     8 * 
     9 * Redistribution and use in source and binary forms, with or without 
     10 * modification, are permitted (subject to the limitations in the 
     11 * disclaimer below) provided that the following conditions are met: 
     12 * 
     13 *  * Redistributions of source code must retain the above copyright 
     14 *    notice, this list of conditions and the following disclaimer. 
     15 * 
     16 *  * Redistributions in binary form must reproduce the above copyright 
     17 *    notice, this list of conditions and the following disclaimer in the 
     18 *    documentation and/or other materials provided with the 
     19 *    distribution. 
     20 * 
     21 *  * Neither the name of Qualcomm Atheros nor the names of its 
     22 *    contributors may be used to endorse or promote products derived 
     23 *    from this software without specific prior written permission. 
     24 * 
     25 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE 
     26 * GRANTED BY THIS LICENSE.  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT 
     27 * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED 
     28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
     29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
     30 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
     31 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
     32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
     33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 
     34 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
     35 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 
     36 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 
     37 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
     38 */ 
     39 
     40#include <linux/pci.h> 
     41#include <linux/ath9k_platform.h> 
     42 
     43#include "machtypes.h" 
     44#include "dev-gpio-buttons.h" 
     45#include "dev-leds-gpio.h" 
     46#include "dev-spi.h" 
     47#include "dev-usb.h" 
     48#include "dev-wmac.h" 
     49#include "pci.h" 
     50 
     51#define DB120_GPIO_LED_WLAN_5G          12 
     52#define DB120_GPIO_LED_WLAN_2G          13 
     53#define DB120_GPIO_LED_STATUS           14 
     54#define DB120_GPIO_LED_WPS              15 
     55 
     56#define DB120_GPIO_BTN_WPS              16 
     57 
     58#define DB120_KEYS_POLL_INTERVAL        20      /* msecs */ 
     59#define DB120_KEYS_DEBOUNCE_INTERVAL    (3 * DB120_KEYS_POLL_INTERVAL) 
     60 
     61#define DB120_WMAC_CALDATA_OFFSET 0x1000 
     62#define DB120_PCIE_CALDATA_OFFSET 0x5000 
     63 
     64static struct gpio_led db120_leds_gpio[] __initdata = { 
     65        { 
     66                .name           = "db120:green:status", 
     67                .gpio           = DB120_GPIO_LED_STATUS, 
     68                .active_low     = 1, 
     69        }, 
     70        { 
     71                .name           = "db120:green:wps", 
     72                .gpio           = DB120_GPIO_LED_WPS, 
     73                .active_low     = 1, 
     74        }, 
     75        { 
     76                .name           = "db120:green:wlan-5g", 
     77                .gpio           = DB120_GPIO_LED_WLAN_5G, 
     78                .active_low     = 1, 
     79        }, 
     80        { 
     81                .name           = "db120:green:wlan-2g", 
     82                .gpio           = DB120_GPIO_LED_WLAN_2G, 
     83                .active_low     = 1, 
     84        }, 
     85}; 
     86 
     87static struct gpio_keys_button db120_gpio_keys[] __initdata = { 
     88        { 
     89                .desc           = "WPS button", 
     90                .type           = EV_KEY, 
     91                .code           = KEY_WPS_BUTTON, 
     92                .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, 
     93                .gpio           = DB120_GPIO_BTN_WPS, 
     94                .active_low     = 1, 
     95        }, 
     96}; 
     97 
     98static struct spi_board_info db120_spi_info[] = { 
     99        { 
     100                .bus_num        = 0, 
     101                .chip_select    = 0, 
     102                .max_speed_hz   = 25000000, 
     103                .modalias       = "s25sl064a", 
     104        } 
     105}; 
     106 
     107static struct ath79_spi_platform_data db120_spi_data = { 
     108        .bus_num        = 0, 
     109        .num_chipselect = 1, 
     110}; 
     111 
     112#ifdef CONFIG_PCI 
     113static struct ath9k_platform_data db120_ath9k_data; 
     114 
     115static int db120_pci_plat_dev_init(struct pci_dev *dev) 
     116{ 
     117        switch (PCI_SLOT(dev->devfn)) { 
     118        case 0: 
     119                dev->dev.platform_data = &db120_ath9k_data; 
     120                break; 
     121        } 
     122 
     123        return 0; 
     124} 
     125 
     126static void __init db120_pci_init(u8 *eeprom) 
     127{ 
     128        memcpy(db120_ath9k_data.eeprom_data, eeprom, 
     129               sizeof(db120_ath9k_data.eeprom_data)); 
     130 
     131        ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); 
     132        ath79_register_pci(); 
     133} 
     134#else 
     135static inline void db120_pci_init(void) {} 
     136#endif /* CONFIG_PCI */ 
     137 
     138static void __init db120_setup(void) 
     139{ 
     140        u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); 
     141 
     142        ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), 
     143                                 db120_leds_gpio); 
     144        ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, 
     145                                        ARRAY_SIZE(db120_gpio_keys), 
     146                                        db120_gpio_keys); 
     147        ath79_register_spi(&db120_spi_data, db120_spi_info, 
     148                           ARRAY_SIZE(db120_spi_info)); 
     149        ath79_register_usb(); 
     150        ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); 
     151        db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); 
     152} 
     153 
     154MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", 
     155             db120_setup); 
  • arch/mips/ath79/machtypes.h

    a b enum ath79_mach_type { 
    1818        ATH79_MACH_GENERIC = 0, 
    1919        ATH79_MACH_AP121,               /* Atheros AP121 reference board */ 
    2020        ATH79_MACH_AP81,                /* Atheros AP81 reference board */ 
     21        ATH79_MACH_DB120,               /* Atheros DB120 reference board */ 
    2122        ATH79_MACH_PB44,                /* Atheros PB44 reference board */ 
    2223        ATH79_MACH_UBNT_XM,             /* Ubiquiti Networks XM board rev 1.0 */ 
    2324}; 
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