source: trunk/target/linux/atheros/patches-2.6.30/002-mips_clocksource_init_war.patch @ 16288

Last change on this file since 16288 was 16288, checked in by nbd, 7 years ago

atheros: add working patches/config for 2.6.30

File size: 1.6 KB
  • arch/mips/kernel/cevt-r4k.c

    a b  
    1515#include <asm/cevt-r4k.h> 
    1616 
    1717/* 
     18 * Compare interrupt can be routed and latched outside the core, 
     19 * so a single execution hazard barrier may not be enough to give 
     20 * it time to clear as seen in the Cause register.  4 time the 
     21 * pipeline depth seems reasonably conservative, and empirically 
     22 * works better in configurations with high CPU/bus clock ratios. 
     23 */ 
     24 
     25#define compare_change_hazard() \ 
     26        do { \ 
     27                irq_disable_hazard(); \ 
     28                irq_disable_hazard(); \ 
     29                irq_disable_hazard(); \ 
     30                irq_disable_hazard(); \ 
     31        } while (0) 
     32 
     33/* 
    1834 * The SMTC Kernel for the 34K, 1004K, et. al. replaces several 
    1935 * of these routines with SMTC-specific variants. 
    2036 */ 
    static int mips_next_event(unsigned long 
    3046        cnt = read_c0_count(); 
    3147        cnt += delta; 
    3248        write_c0_compare(cnt); 
     49        compare_change_hazard(); 
    3350        res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0; 
    3451        return res; 
    3552} 
    static int c0_compare_int_pending(void) 
    99116        return (read_c0_cause() >> cp0_compare_irq) & 0x100; 
    100117} 
    101118 
    102 /* 
    103  * Compare interrupt can be routed and latched outside the core, 
    104  * so a single execution hazard barrier may not be enough to give 
    105  * it time to clear as seen in the Cause register.  4 time the 
    106  * pipeline depth seems reasonably conservative, and empirically 
    107  * works better in configurations with high CPU/bus clock ratios. 
    108  */ 
    109  
    110 #define compare_change_hazard() \ 
    111         do { \ 
    112                 irq_disable_hazard(); \ 
    113                 irq_disable_hazard(); \ 
    114                 irq_disable_hazard(); \ 
    115                 irq_disable_hazard(); \ 
    116         } while (0) 
    117  
    118119int c0_compare_int_usable(void) 
    119120{ 
    120121        unsigned int delta; 
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