source: trunk/target/linux/brcm47xx/patches-2.6.33/275-usb2-bcm5354-init.patch @ 21430

Last change on this file since 21430 was 21430, checked in by hauke, 7 years ago

brcm47xx: use tab instead of space

File size: 1.9 KB
  • drivers/usb/host/ohci-ssb.c

    This patch significantly improves the reliability of high speed 
    usb writes on the bcm5354. It implements a work around for version 2
    of the usb20 core that was cribbed from the GPL sources for the 
    Asus wl500gpv2 and verified against the wl520gu sources.
    
    Reference:
    GPL/WL-520gu-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c
    GPL/WL-500gPV2-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c
    
    Signed-off-by: Steve Brown <sbrown@cortland.com>
    
    ---
     drivers/usb/host/ohci-ssb.c |   37 +++++++++++++++++++++++--------------
     1 file changed, 23 insertions(+), 14 deletions(-)
    
    a b static int ssb_ohci_attach(struct ssb_de 
    141141                 */ 
    142142                ssb_device_enable(dev, 0); 
    143143                ssb_write32(dev, 0x200, 0x7ff); 
     144 
     145                /* Change Flush control reg */ 
     146                tmp = ssb_read32(dev, 0x400); 
     147                tmp &= ~8; 
     148                ssb_write32(dev, 0x400, tmp); 
     149                tmp = ssb_read32(dev, 0x400); 
     150 
     151                /* Change Shim control reg */ 
     152                tmp = ssb_read32(dev, 0x304); 
     153                tmp &= ~0x100; 
     154                ssb_write32(dev, 0x304, tmp); 
     155                tmp = ssb_read32(dev, 0x304); 
     156 
    144157                udelay(1); 
    145                 if (dev->id.revision == 1) { // bug in rev 1 
    146158 
    147                         /* Change Flush control reg */ 
    148                         tmp = ssb_read32(dev, 0x400); 
    149                         tmp &= ~8; 
    150                         ssb_write32(dev, 0x400, tmp); 
    151                         tmp = ssb_read32(dev, 0x400); 
    152                         printk("USB20H fcr: 0x%0x\n", tmp); 
    153  
    154                         /* Change Shim control reg */ 
    155                         tmp = ssb_read32(dev, 0x304); 
    156                         tmp &= ~0x100; 
    157                         ssb_write32(dev, 0x304, tmp); 
    158                         tmp = ssb_read32(dev, 0x304); 
    159                         printk("USB20H shim: 0x%0x\n", tmp); 
     159                /* Work around for 5354 failures */ 
     160                if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) { 
     161                        /* Change syn01 reg */ 
     162                        tmp = 0x00fe00fe; 
     163                        ssb_write32(dev, 0x894, tmp); 
     164 
     165                        /* Change syn03 reg */ 
     166                        tmp = ssb_read32(dev, 0x89c); 
     167                        tmp |= 0x1; 
     168                        ssb_write32(dev, 0x89c, tmp); 
    160169                } 
    161170        } else 
    162171                ssb_device_enable(dev, 0); 
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