source: trunk/target/linux/generic/patches-2.6.38/020-ssb_update.patch @ 26690

Last change on this file since 26690 was 26690, checked in by nbd, 6 years ago

kernel: reorganize 2.6.38 patches, clean up block2mtd patches

File size: 5.3 KB
  • drivers/ssb/main.c

    a b void ssb_device_enable(struct ssb_device 
    11921192} 
    11931193EXPORT_SYMBOL(ssb_device_enable); 
    11941194 
    1195 /* Wait for a bit in a register to get set or unset. 
     1195/* Wait for bitmask in a register to get set or cleared. 
    11961196 * timeout is in units of ten-microseconds */ 
    1197 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask, 
    1198                         int timeout, int set) 
     1197static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask, 
     1198                         int timeout, int set) 
    11991199{ 
    12001200        int i; 
    12011201        u32 val; 
    static int ssb_wait_bit(struct ssb_devic 
    12031203        for (i = 0; i < timeout; i++) { 
    12041204                val = ssb_read32(dev, reg); 
    12051205                if (set) { 
    1206                         if (val & bitmask) 
     1206                        if ((val & bitmask) == bitmask) 
    12071207                                return 0; 
    12081208                } else { 
    12091209                        if (!(val & bitmask)) 
    static int ssb_wait_bit(struct ssb_devic 
    12201220 
    12211221void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags) 
    12221222{ 
    1223         u32 reject; 
     1223        u32 reject, val; 
    12241224 
    12251225        if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET) 
    12261226                return; 
    12271227 
    12281228        reject = ssb_tmslow_reject_bitmask(dev); 
    1229         ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 
    1230         ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1); 
    1231         ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 
    1232         ssb_write32(dev, SSB_TMSLOW, 
    1233                     SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 
    1234                     reject | SSB_TMSLOW_RESET | 
    1235                     core_specific_flags); 
    1236         ssb_flush_tmslow(dev); 
     1229 
     1230        if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { 
     1231                ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); 
     1232                ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1); 
     1233                ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0); 
     1234 
     1235                if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { 
     1236                        val = ssb_read32(dev, SSB_IMSTATE); 
     1237                        val |= SSB_IMSTATE_REJECT; 
     1238                        ssb_write32(dev, SSB_IMSTATE, val); 
     1239                        ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000, 
     1240                                      0); 
     1241                } 
     1242 
     1243                ssb_write32(dev, SSB_TMSLOW, 
     1244                        SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | 
     1245                        reject | SSB_TMSLOW_RESET | 
     1246                        core_specific_flags); 
     1247                ssb_flush_tmslow(dev); 
     1248 
     1249                if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) { 
     1250                        val = ssb_read32(dev, SSB_IMSTATE); 
     1251                        val &= ~SSB_IMSTATE_REJECT; 
     1252                        ssb_write32(dev, SSB_IMSTATE, val); 
     1253                } 
     1254        } 
    12371255 
    12381256        ssb_write32(dev, SSB_TMSLOW, 
    12391257                    reject | SSB_TMSLOW_RESET | 
  • drivers/ssb/pci.c

    a b static void sprom_extract_r45(struct ssb 
    468468                SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0); 
    469469                SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); 
    470470                SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); 
     471                SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); 
     472                SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); 
    471473        } else { 
    472474                SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0); 
    473475                SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); 
    474476                SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); 
     477                SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); 
     478                SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0); 
    475479        } 
    476480        SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A, 
    477481             SSB_SPROM4_ANTAVAIL_A_SHIFT); 
    static int sprom_extract(struct ssb_bus  
    641645                break; 
    642646        default: 
    643647                ssb_printk(KERN_WARNING PFX "Unsupported SPROM" 
    644                            "  revision %d detected. Will extract" 
     648                           " revision %d detected. Will extract" 
    645649                           " v1\n", out->revision); 
    646650                out->revision = 1; 
    647651                sprom_extract_r123(out, in); 
  • include/linux/ssb/ssb_regs.h

    a b  
    8585#define  SSB_IMSTATE_AP_RSV     0x00000030 /* Reserved */ 
    8686#define  SSB_IMSTATE_IBE        0x00020000 /* In Band Error */ 
    8787#define  SSB_IMSTATE_TO         0x00040000 /* Timeout */ 
     88#define  SSB_IMSTATE_BUSY       0x01800000 /* Busy (Backplane rev >= 2.3 only) */ 
     89#define  SSB_IMSTATE_REJECT     0x02000000 /* Reject (Backplane rev >= 2.3 only) */ 
    8890#define SSB_INTVEC              0x0F94     /* SB Interrupt Mask */ 
    8991#define  SSB_INTVEC_PCI         0x00000001 /* Enable interrupts for PCI */ 
    9092#define  SSB_INTVEC_ENET0       0x00000002 /* Enable interrupts for enet 0 */ 
     
    9799#define  SSB_TMSLOW_RESET       0x00000001 /* Reset */ 
    98100#define  SSB_TMSLOW_REJECT_22   0x00000002 /* Reject (Backplane rev 2.2) */ 
    99101#define  SSB_TMSLOW_REJECT_23   0x00000004 /* Reject (Backplane rev 2.3) */ 
    100 #define  SSB_TMSLOW_PHYCLK      0x00000010 /* MAC PHY Clock Control Enable */ 
    101102#define  SSB_TMSLOW_CLOCK       0x00010000 /* Clock Enable */ 
    102103#define  SSB_TMSLOW_FGC         0x00020000 /* Force Gated Clocks On */ 
    103104#define  SSB_TMSLOW_PE          0x40000000 /* Power Management Enable */ 
     
    268269/* SPROM Revision 4 */ 
    269270#define SSB_SPROM4_BFLLO                0x0044  /* Boardflags (low 16 bits) */ 
    270271#define SSB_SPROM4_BFLHI                0x0046  /* Board Flags Hi */ 
     272#define SSB_SPROM4_BFL2LO               0x0048  /* Board flags 2 (low 16 bits) */ 
     273#define SSB_SPROM4_BFL2HI               0x004A  /* Board flags 2 Hi */ 
    271274#define SSB_SPROM4_IL0MAC               0x004C  /* 6 byte MAC address for a/b/g/n */ 
    272275#define SSB_SPROM4_CCODE                0x0052  /* Country Code (2 bytes) */ 
    273276#define SSB_SPROM4_GPIOA                0x0056  /* Gen. Purpose IO # 0 and 1 */ 
     
    358361#define SSB_SPROM5_CCODE                0x0044  /* Country Code (2 bytes) */ 
    359362#define SSB_SPROM5_BFLLO                0x004A  /* Boardflags (low 16 bits) */ 
    360363#define SSB_SPROM5_BFLHI                0x004C  /* Board Flags Hi */ 
     364#define SSB_SPROM5_BFL2LO               0x004E  /* Board flags 2 (low 16 bits) */ 
     365#define SSB_SPROM5_BFL2HI               0x0050  /* Board flags 2 Hi */ 
    361366#define SSB_SPROM5_IL0MAC               0x0052  /* 6 byte MAC address for a/b/g/n */ 
    362367#define SSB_SPROM5_GPIOA                0x0076  /* Gen. Purpose IO # 0 and 1 */ 
    363368#define  SSB_SPROM5_GPIOA_P0            0x00FF  /* Pin 0 */ 
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