source: trunk/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h @ 30887

Last change on this file since 30887 was 30887, checked in by juhosg, 4 years ago

ramips: introduce ramips_soc_prom_init and move SoC detection into that

File size: 3.8 KB
Line 
1/*
2 * Ralink RT305x SoC specific definitions
3 *
4 * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * Parts of this file are based on Ralink's 2.6.21 BSP
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#ifndef _RT305X_H_
14#define _RT305X_H_
15
16#include <linux/init.h>
17#include <linux/io.h>
18
19#define RT305X_MEM_SIZE_MIN (2 * 1024 * 1024)
20#define RT305X_MEM_SIZE_MAX (64 * 1024 * 1024)
21
22#define RT305X_CPU_IRQ_BASE     0
23#define RT305X_INTC_IRQ_BASE    8
24#define RT305X_INTC_IRQ_COUNT   32
25#define RT305X_GPIO_IRQ_BASE    40
26
27#define RT305X_CPU_IRQ_INTC     (RT305X_CPU_IRQ_BASE + 2)
28#define RT305X_CPU_IRQ_FE       (RT305X_CPU_IRQ_BASE + 5)
29#define RT305X_CPU_IRQ_WNIC     (RT305X_CPU_IRQ_BASE + 6)
30#define RT305X_CPU_IRQ_COUNTER  (RT305X_CPU_IRQ_BASE + 7)
31
32#define RT305X_INTC_IRQ_SYSCTL  (RT305X_INTC_IRQ_BASE + 0)
33#define RT305X_INTC_IRQ_TIMER0  (RT305X_INTC_IRQ_BASE + 1)
34#define RT305X_INTC_IRQ_TIMER1  (RT305X_INTC_IRQ_BASE + 2)
35#define RT305X_INTC_IRQ_IA      (RT305X_INTC_IRQ_BASE + 3)
36#define RT305X_INTC_IRQ_PCM     (RT305X_INTC_IRQ_BASE + 4)
37#define RT305X_INTC_IRQ_UART0   (RT305X_INTC_IRQ_BASE + 5)
38#define RT305X_INTC_IRQ_PIO     (RT305X_INTC_IRQ_BASE + 6)
39#define RT305X_INTC_IRQ_DMA     (RT305X_INTC_IRQ_BASE + 7)
40#define RT305X_INTC_IRQ_NAND    (RT305X_INTC_IRQ_BASE + 8)
41#define RT305X_INTC_IRQ_PERFC   (RT305X_INTC_IRQ_BASE + 9)
42#define RT305X_INTC_IRQ_I2S     (RT305X_INTC_IRQ_BASE + 10)
43#define RT305X_INTC_IRQ_UART1   (RT305X_INTC_IRQ_BASE + 12)
44#define RT305X_INTC_IRQ_ESW     (RT305X_INTC_IRQ_BASE + 17)
45#define RT305X_INTC_IRQ_OTG     (RT305X_INTC_IRQ_BASE + 18)
46
47extern void __iomem *rt305x_sysc_base;
48extern void __iomem *rt305x_memc_base;
49
50static inline void rt305x_sysc_wr(u32 val, unsigned reg)
51{
52        __raw_writel(val, rt305x_sysc_base + reg);
53}
54
55static inline u32 rt305x_sysc_rr(unsigned reg)
56{
57        return __raw_readl(rt305x_sysc_base + reg);
58}
59
60static inline void rt305x_memc_wr(u32 val, unsigned reg)
61{
62        __raw_writel(val, rt305x_memc_base + reg);
63}
64
65static inline u32 rt305x_memc_rr(unsigned reg)
66{
67        return __raw_readl(rt305x_memc_base + reg);
68}
69
70#define RT305X_GPIO_I2C_SD      1
71#define RT305X_GPIO_I2C_SCLK    2
72#define RT305X_GPIO_SPI_EN      3
73#define RT305X_GPIO_SPI_CLK     4
74#define RT305X_GPIO_SPI_DOUT    5
75#define RT305X_GPIO_SPI_DIN     6
76/* GPIO 7-14 is shared between UART0, PCM  and I2S interfaces */
77#define RT305X_GPIO_7           7
78#define RT305X_GPIO_8           8
79#define RT305X_GPIO_9           9
80#define RT305X_GPIO_10          10
81#define RT305X_GPIO_11          11
82#define RT305X_GPIO_12          12
83#define RT305X_GPIO_13          13
84#define RT305X_GPIO_14          14
85#define RT305X_GPIO_UART1_TXD   15
86#define RT305X_GPIO_UART1_RXD   16
87#define RT305X_GPIO_JTAG_TDO    17
88#define RT305X_GPIO_JTAG_TDI    18
89#define RT305X_GPIO_JTAG_TMS    19
90#define RT305X_GPIO_JTAG_TCLK   20
91#define RT305X_GPIO_JTAG_TRST_N 21
92#define RT305X_GPIO_MDIO_MDC    22
93#define RT305X_GPIO_MDIO_MDIO   23
94#define RT305X_GPIO_SDRAM_MD16  24
95#define RT305X_GPIO_SDRAM_MD17  25
96#define RT305X_GPIO_SDRAM_MD18  26
97#define RT305X_GPIO_SDRAM_MD19  27
98#define RT305X_GPIO_SDRAM_MD20  28
99#define RT305X_GPIO_SDRAM_MD21  29
100#define RT305X_GPIO_SDRAM_MD22  30
101#define RT305X_GPIO_SDRAM_MD23  31
102#define RT305X_GPIO_SDRAM_MD24  32
103#define RT305X_GPIO_SDRAM_MD25  33
104#define RT305X_GPIO_SDRAM_MD26  34
105#define RT305X_GPIO_SDRAM_MD27  35
106#define RT305X_GPIO_SDRAM_MD28  36
107#define RT305X_GPIO_SDRAM_MD29  37
108#define RT305X_GPIO_SDRAM_MD30  38
109#define RT305X_GPIO_SDRAM_MD31  39
110#define RT305X_GPIO_GE0_TXD0    40
111#define RT305X_GPIO_GE0_TXD1    41
112#define RT305X_GPIO_GE0_TXD2    42
113#define RT305X_GPIO_GE0_TXD3    43
114#define RT305X_GPIO_GE0_TXEN    44
115#define RT305X_GPIO_GE0_TXCLK   45
116#define RT305X_GPIO_GE0_RXD0    46
117#define RT305X_GPIO_GE0_RXD1    47
118#define RT305X_GPIO_GE0_RXD2    48
119#define RT305X_GPIO_GE0_RXD3    49
120#define RT305X_GPIO_GE0_RXDV    50
121#define RT305X_GPIO_GE0_RXCLK   51
122
123void rt305x_gpio_init(u32 mode);
124
125#endif /* _RT305X_H_ */
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