source: trunk/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c @ 17439

Last change on this file since 17439 was 17439, checked in by juhosg, 7 years ago

[ramips] initial support for RT288x/RT305x

File size: 1.9 KB
Line 
1/*
2 * Ralink RT288x SoC specific setup
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Ralink's 2.6.21 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/module.h>
17
18#include <asm/mach-ralink/rt288x.h>
19#include <asm/mach-ralink/rt288x_regs.h>
20
21unsigned char rt288x_sys_type[RT288X_SYS_TYPE_LEN];
22
23unsigned long rt288x_cpu_freq;
24EXPORT_SYMBOL_GPL(rt288x_cpu_freq);
25
26unsigned long rt288x_sys_freq;
27EXPORT_SYMBOL_GPL(rt288x_sys_freq);
28
29void __iomem * rt288x_intc_base;
30void __iomem * rt288x_sysc_base;
31void __iomem * rt288x_memc_base;
32
33void __init rt288x_detect_sys_type(void)
34{
35        u32 n0;
36        u32 n1;
37        u32 id;
38
39        n0 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME0);
40        n1 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME1);
41        id = rt288x_sysc_rr(SYSC_REG_CHIP_ID);
42
43        snprintf(rt288x_sys_type, RT288X_SYS_TYPE_LEN,
44                "Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
45                (char) (n0 & 0xff), (char) ((n0 >> 8) & 0xff),
46                (char) ((n0 >> 16) & 0xff), (char) ((n0 >> 24) & 0xff),
47                (char) (n1 & 0xff), (char) ((n1 >> 8) & 0xff),
48                (char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
49                (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
50                (id & CHIP_ID_REV_MASK));
51}
52
53void __init rt288x_detect_sys_freq(void)
54{
55        u32     t;
56
57        t = rt288x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
58        t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
59
60        switch (t) {
61        case SYSTEM_CONFIG_CPUCLK_250:
62                rt288x_cpu_freq = 250000000;
63                break;
64        case SYSTEM_CONFIG_CPUCLK_266:
65                rt288x_cpu_freq = 266666667;
66                break;
67        case SYSTEM_CONFIG_CPUCLK_280:
68                rt288x_cpu_freq = 280000000;
69                break;
70        case SYSTEM_CONFIG_CPUCLK_300:
71                rt288x_cpu_freq = 300000000;
72                break;
73        }
74
75        rt288x_sys_freq = rt288x_cpu_freq / 2;
76}
77
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