Changeset 15146


Ignore:
Timestamp:
2009-04-08T10:52:57+02:00 (8 years ago)
Author:
florian
Message:

[brcm63xx] some more fixes to the SPI controller driver

Location:
trunk/target/linux/brcm63xx/files
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/brcm63xx/files/drivers/spi/bcm63xx_spi.c

    r14848 r15146  
    3737 
    3838#define PFX             KBUILD_MODNAME 
    39 #define DRV_VER         "0.1.1" 
     39#define DRV_VER         "0.1.2" 
    4040 
    4141struct bcm63xx_spi { 
     
    6363static void bcm63xx_spi_chipselect(struct spi_device *spi, int is_on) 
    6464{ 
     65        struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); 
    6566        u16 val; 
    6667 
    67         val = bcm_spi_readw(SPI_CMD); 
     68        val = bcm_spi_readw(bs->regs, SPI_CMD); 
    6869        if (is_on == BITBANG_CS_INACTIVE) 
    6970                val |= SPI_CMD_NOOP; 
     
    7172                val |= (1 << spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); 
    7273                 
    73         bcm_spi_writew(val, SPI_CMD); 
     74        bcm_spi_writew(val, bs->regs, SPI_CMD); 
    7475} 
    7576 
     
    126127        } 
    127128 
    128         bcm_spi_writeb(clk_cfg, SPI_CLK_CFG); 
     129        bcm_spi_writeb(clk_cfg, bs->regs, SPI_CLK_CFG); 
    129130        dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n", 
    130131                                                                div, hz, clk_cfg); 
     
    173174 
    174175        /* Fill the Tx FIFO with as many bytes as possible */ 
    175         tail = bcm_spi_readb(SPI_MSG_TAIL); 
     176        tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); 
    176177        while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) { 
    177178                if (bs->tx_ptr) 
    178                         bcm_spi_writeb(*bs->tx_ptr++, SPI_MSG_DATA); 
     179                        bcm_spi_writeb(*bs->tx_ptr++, bs->regs, SPI_MSG_DATA); 
    179180                else 
    180                         bcm_spi_writeb(0, SPI_MSG_DATA);  
     181                        bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA);  
    181182                bs->remaining_bytes--; 
    182                 tail = bcm_spi_readb(SPI_MSG_TAIL); 
     183                tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); 
    183184        } 
    184185} 
     
    203204        /* Enable the command done interrupt which 
    204205         * we use to determine completion of a command */ 
    205         bcm_writeb(SPI_INTR_CMD_DONE, SPI_INT_MASK); 
     206        bcm_spi_writeb(SPI_INTR_CMD_DONE, bs->regs, SPI_INT_MASK); 
    206207         
    207208        /* Fill in the Message control register */ 
    208         msg_ctl = bcm_spi_readb(SPI_MSG_CTL); 
     209        msg_ctl = bcm_spi_readb(bs->regs, SPI_MSG_CTL); 
    209210        msg_ctl |= (t->len << SPI_BYTE_CNT_SHIFT); 
    210211        msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT); 
    211         bcm_spi_writeb(msg_ctl, SPI_MSG_CTL); 
     212        bcm_spi_writeb(msg_ctl, bs->regs, SPI_MSG_CTL); 
    212213         
    213214        /* Issue the transfer */ 
    214         cmd = bcm_spi_readb(SPI_CMD); 
     215        cmd = bcm_spi_readb(bs->regs, SPI_CMD); 
    215216        cmd |= SPI_CMD_START_IMMEDIATE; 
    216217        cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); 
    217         bcm_spi_writeb(cmd, SPI_CMD); 
     218        bcm_spi_writeb(cmd, bs->regs, SPI_CMD); 
    218219 
    219220        wait_for_completion(&bs->done);  
    220221 
    221222        /* Disable the CMD_DONE interrupt */ 
    222         bcm_spi_writeb(~(SPI_INTR_CMD_DONE), SPI_INT_MASK); 
     223        bcm_spi_writeb(~(SPI_INTR_CMD_DONE), bs->regs, SPI_INT_MASK); 
    223224 
    224225        return t->len - bs->remaining_bytes; 
     
    236237 
    237238        /* Read interupts and clear them immediately */ 
    238         intr = bcm_spi_readb(SPI_INT_STATUS); 
    239         bcm_writeb(SPI_INTR_CLEAR_ALL, SPI_INT_STATUS); 
     239        intr = bcm_spi_readb(bs->regs, SPI_INT_STATUS); 
     240        bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_STATUS); 
    240241 
    241242        /* A tansfer completed */ 
     
    243244                u8 rx_empty; 
    244245         
    245                 rx_empty = bcm_spi_readb(SPI_ST); 
     246                rx_empty = bcm_spi_readb(bs->regs, SPI_ST); 
    246247                /* Read out all the data */ 
    247248                while ((rx_empty & SPI_RX_EMPTY) == 0) { 
    248249                        u8 data; 
    249250                 
    250                         data = bcm_spi_readb(SPI_RX_DATA); 
     251                        data = bcm_spi_readb(bs->regs, SPI_RX_DATA); 
    251252                        if (bs->rx_ptr) 
    252253                                *bs->rx_ptr++ = data; 
    253254 
    254                         rx_empty = bcm_spi_readb(SPI_RX_EMPTY); 
     255                        rx_empty = bcm_spi_readb(bs->regs, SPI_RX_EMPTY); 
    255256                } 
    256257 
     
    260261 
    261262                        /* Start the transfer */ 
    262                         cmd = bcm_spi_readb(SPI_CMD); 
     263                        cmd = bcm_spi_readb(bs->regs, SPI_CMD); 
    263264                        cmd |= SPI_CMD_START_IMMEDIATE; 
    264265                        cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); 
    265                         bcm_spi_writeb(cmd, SPI_CMD); 
     266                        bcm_spi_writeb(cmd, bs->regs, SPI_CMD); 
    266267                } else 
    267268                        complete(&bs->done); 
     
    347348        /* Initialize hardware */ 
    348349        clk_enable(bs->clk); 
    349         bcm_spi_writew(SPI_CMD_HARD_RESET, SPI_CMD); 
    350         bcm_spi_writeb(SPI_INTR_CLEAR_ALL, SPI_INT_MASK); 
     350        bcm_spi_writew(SPI_CMD_HARD_RESET, bs->regs, SPI_CMD); 
     351        bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK); 
    351352         
    352353        dev_info(&pdev->dev, PFX " at 0x%08x (irq %d, FIFOs size %d) v%s\n", 
     
    443444MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver"); 
    444445MODULE_LICENSE("GPL"); 
     446MODULE_VERSION(DRV_VER); 
  • trunk/target/linux/brcm63xx/files/include/asm-mips/mach-bcm63xx/bcm63xx_io.h

    r14792 r15146  
    9494 * helpers for the SPI register sets 
    9595 */ 
    96 #define bcm_spi_readb(o)        bcm_readb(bcm63xx_regset_address(RSET_SPI) + \ 
     96#define bcm_spi_readb(b,o)      bcm_readb((b) + \ 
    9797                                        bcm63xx_spireg(o)) 
    98 #define bcm_spi_readw(o)        bcm_readw(bcm63xx_regset_address(RSET_SPI) + \ 
     98#define bcm_spi_readw(b,o)      bcm_readw((b) + \ 
    9999                                        bcm63xx_spireg(o)) 
    100 #define bcm_spi_writeb(v,o)     bcm_writeb((v), \ 
    101                                         bcm63xx_regset_address(RSET_SPI) + \ 
     100#define bcm_spi_writeb(v,b,o)   bcm_writeb((v), \ 
     101                                        (b) + \ 
    102102                                        bcm63xx_spireg(o)) 
    103 #define bcm_spi_writew(v,o)     bcm_writew((v), \ 
    104                                         bcm63xx_regset_address(RSET_SPI) + \ 
     103#define bcm_spi_writew(v,b,o)   bcm_writew((v), \ 
     104                                        (b) + \ 
    105105                                        bcm63xx_spireg(o)) 
    106106 
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