Changeset 25125


Ignore:
Timestamp:
2011-01-26T21:48:39+01:00 (6 years ago)
Author:
juhosg
Message:

ramips: implement clock API for RT288x

Location:
trunk/target/linux/ramips/files/arch/mips
Files:
2 added
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h

    r25123 r25125  
    22 * Ralink RT288x SoC specific definitions 
    33 * 
    4  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> 
     4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 
    55 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 
    66 * 
     
    1919 
    2020void rt288x_detect_sys_type(void); 
    21 void rt288x_detect_sys_freq(void); 
    22  
    23 extern unsigned long rt288x_cpu_freq; 
    24 extern unsigned long rt288x_sys_freq; 
    2521 
    2622#define RT288X_CPU_IRQ_BASE     0 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt288x/Makefile

    r19321 r25125  
    1010# by the Free Software Foundation. 
    1111 
    12 obj-y   := irq.o setup.o rt288x.o devices.o 
     12obj-y   := irq.o setup.o rt288x.o devices.o clock.o 
    1313 
    1414obj-$(CONFIG_EARLY_PRINTK)              += early_printk.o 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt288x/devices.c

    r22212 r25125  
    22 *  Ralink RT288x SoC platform device registration 
    33 * 
    4  *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> 
     4 *  Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 
    55 *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 
    66 * 
     
    1515#include <linux/mtd/physmap.h> 
    1616#include <linux/etherdevice.h> 
     17#include <linux/err.h> 
     18#include <linux/clk.h> 
    1719 
    1820#include <asm/addrspace.h> 
     
    155157void __init rt288x_register_ethernet(void) 
    156158{ 
    157         rt288x_eth_data.sys_freq = rt288x_sys_freq; 
     159        struct clk *clk; 
     160 
     161        clk = clk_get(NULL, "sys"); 
     162        if (IS_ERR(clk)) 
     163                panic("unable to get SYS clock, err=%ld", PTR_ERR(clk)); 
     164 
     165        rt288x_eth_data.sys_freq = clk_get_rate(clk); 
    158166        rt288x_eth_data.reset_fe = rt288x_fe_reset; 
    159167        rt288x_eth_data.min_pkt_len = 64; 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c

    r17512 r25125  
    2121#include <asm/mach-ralink/rt288x_regs.h> 
    2222 
    23 unsigned long rt288x_cpu_freq; 
    24 EXPORT_SYMBOL_GPL(rt288x_cpu_freq); 
    25  
    26 unsigned long rt288x_sys_freq; 
    27 EXPORT_SYMBOL_GPL(rt288x_sys_freq); 
    28  
    2923void __iomem * rt288x_sysc_base; 
    3024void __iomem * rt288x_memc_base; 
     
    4842                (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK, 
    4943                (id & CHIP_ID_REV_MASK)); 
    50 } 
    51  
    52 void __init rt288x_detect_sys_freq(void) 
    53 { 
    54         u32     t; 
    55  
    56         t = rt288x_sysc_rr(SYSC_REG_SYSTEM_CONFIG); 
    57         t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); 
    58  
    59         switch (t) { 
    60         case SYSTEM_CONFIG_CPUCLK_250: 
    61                 rt288x_cpu_freq = 250000000; 
    62                 break; 
    63         case SYSTEM_CONFIG_CPUCLK_266: 
    64                 rt288x_cpu_freq = 266666667; 
    65                 break; 
    66         case SYSTEM_CONFIG_CPUCLK_280: 
    67                 rt288x_cpu_freq = 280000000; 
    68                 break; 
    69         case SYSTEM_CONFIG_CPUCLK_300: 
    70                 rt288x_cpu_freq = 300000000; 
    71                 break; 
    72         } 
    73  
    74         rt288x_sys_freq = rt288x_cpu_freq / 2; 
    7544} 
    7645 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt288x/setup.c

    r17467 r25125  
    1515#include <linux/init.h> 
    1616#include <linux/io.h> 
     17#include <linux/err.h> 
     18#include <linux/clk.h> 
    1719 
    1820#include <asm/mips_machine.h> 
     
    2325#include <asm/mach-ralink/rt288x.h> 
    2426#include <asm/mach-ralink/rt288x_regs.h> 
     27#include "common.h" 
    2528 
    2629static void rt288x_restart(char *command) 
     
    4548void __init ramips_soc_setup(void) 
    4649{ 
     50        struct clk *clk; 
     51 
    4752        rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE); 
    4853        rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE); 
    4954 
    5055        rt288x_detect_sys_type(); 
    51         rt288x_detect_sys_freq(); 
     56        rt288x_clocks_init(); 
     57 
     58        clk = clk_get(NULL, "cpu"); 
     59        if (IS_ERR(clk)) 
     60                panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); 
    5261 
    5362        printk(KERN_INFO "%s running at %lu.%02lu MHz\n", ramips_sys_type, 
    54                 rt288x_cpu_freq / 1000000, 
    55                 (rt288x_cpu_freq % 1000000) * 100 / 1000000); 
     63                clk_get_rate(clk) / 1000000, 
     64                (clk_get_rate(clk) % 1000000) * 100 / 1000000); 
    5665 
    5766        _machine_restart = rt288x_restart; 
     
    5968        pm_power_off = rt288x_halt; 
    6069 
    61         ramips_early_serial_setup(0, RT2880_UART0_BASE, rt288x_sys_freq, 
     70        clk = clk_get(NULL, "uart"); 
     71        if (IS_ERR(clk)) 
     72                panic("unable to get UART clock, err=%ld", PTR_ERR(clk)); 
     73 
     74        ramips_early_serial_setup(0, RT2880_UART0_BASE, clk_get_rate(clk), 
    6275                                  RT2880_INTC_IRQ_UART0); 
    63         ramips_early_serial_setup(1, RT2880_UART1_BASE, rt288x_sys_freq, 
     76        ramips_early_serial_setup(1, RT2880_UART1_BASE, clk_get_rate(clk), 
    6477                                  RT2880_INTC_IRQ_UART1); 
    6578} 
     
    6780void __init plat_time_init(void) 
    6881{ 
    69         mips_hpt_frequency = rt288x_cpu_freq / 2; 
     82        struct clk *clk; 
     83 
     84        clk = clk_get(NULL, "cpu"); 
     85        if (IS_ERR(clk)) 
     86                panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); 
     87 
     88        mips_hpt_frequency = clk_get_rate(clk) / 2; 
    7089} 
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