Ignore:
Timestamp:
2011-04-09T20:25:55+02:00 (5 years ago)
Author:
nbd
Message:

atheros: fix ath5k support on ar2315/2317

  • Use physical addresses definition for AR2315 the same way as AR5312. Fixes ioremap
  • Fix dma mapping for AHB bus (only use the PCI DMA offset for PCI devices)

Based on patches by Wojciech Dubowik

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/atheros/patches-2.6.37/100-board.patch

    r25914 r26554  
    553553--- /dev/null 
    554554+++ b/arch/mips/include/asm/mach-ar231x/dma-coherence.h 
    555 @@ -0,0 +1,64 @@ 
     555@@ -0,0 +1,76 @@ 
    556556+/* 
    557557+ * This file is subject to the terms and conditions of the GNU General Public 
     
    568568+#define PCI_DMA_OFFSET 0x20000000 
    569569+ 
    570 +struct device; 
     570+#include <linux/device.h> 
     571+ 
     572+static inline dma_addr_t ar231x_dev_offset(struct device *dev) 
     573+{ 
     574+#ifdef CONFIG_PCI 
     575+       extern struct bus_type pci_bus_type; 
     576+ 
     577+       if (dev && dev->bus == &pci_bus_type) 
     578+               return PCI_DMA_OFFSET; 
     579+       else 
     580+#endif 
     581+               return 0; 
     582+} 
    571583+ 
    572584+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) 
    573585+{ 
    574 +       return virt_to_phys(addr) + (dev != NULL ? PCI_DMA_OFFSET : 0); 
     586+       return virt_to_phys(addr) + ar231x_dev_offset(dev); 
    575587+} 
    576588+ 
    577589+static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) 
    578590+{ 
    579 +       return page_to_phys(page) + (dev != NULL ? PCI_DMA_OFFSET : 0); 
     591+       return page_to_phys(page) + ar231x_dev_offset(dev); 
    580592+} 
    581593+ 
     
    583595+       dma_addr_t dma_addr) 
    584596+{ 
    585 +       return (dma_addr > PCI_DMA_OFFSET ? dma_addr - PCI_DMA_OFFSET : dma_addr); 
     597+       return dma_addr - ar231x_dev_offset(dev); 
    586598+} 
    587599+ 
     
    774786+ */ 
    775787+#define AR2315_SPI_READ         0x08000000      /* SPI FLASH */ 
    776 +#define AR2315_WLAN0            0xB0000000      /* Wireless MMR */ 
    777 +#define AR2315_PCI              0xB0100000      /* PCI MMR */ 
    778 +#define AR2315_SDRAMCTL         0xB0300000      /* SDRAM MMR */ 
    779 +#define AR2315_LOCAL            0xB0400000      /* LOCAL BUS MMR */ 
    780 +#define AR2315_ENET0            0xB0500000      /* ETHERNET MMR */ 
    781 +#define AR2315_DSLBASE          0xB1000000      /* RESET CONTROL MMR */ 
    782 +#define AR2315_UART0            0xB1100003      /* UART MMR */ 
    783 +#define AR2315_SPI              0xB1300000      /* SPI FLASH MMR */ 
     788+#define AR2315_WLAN0            0x10000000      /* Wireless MMR */ 
     789+#define AR2315_PCI              0x10100000      /* PCI MMR */ 
     790+#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */ 
     791+#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */ 
     792+#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */ 
     793+#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */ 
     794+#define AR2315_UART0            0x11100003      /* UART MMR */ 
     795+#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */ 
    784796+#define AR2315_PCIEXT           0x80000000      /* pci external */ 
    785797+ 
     
    24632475+       .reset_mac = AR2315_RESET_ENET0, 
    24642476+       .reset_phy = AR2315_RESET_EPHY0, 
    2465 +       .phy_base = AR2315_ENET0, 
     2477+       .phy_base = KSEG1ADDR(AR2315_ENET0), 
    24662478+       .config = &ar231x_board, 
    24672479+}; 
     
    25012513+spiflash_read_reg(int reg) 
    25022514+{ 
    2503 +       return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg); 
     2515+       return ar231x_read_reg(AR2315_SPI + reg); 
    25042516+} 
    25052517+ 
     
    25072519+spiflash_write_reg(int reg, u32 data) 
    25082520+{ 
    2509 +       ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data); 
     2521+       ar231x_write_reg(AR2315_SPI + reg, data); 
    25102522+} 
    25112523+ 
     
    26362648+       platform_device_register(&ar2315_wdt); 
    26372649+       platform_device_register(&ar2315_spiflash); 
    2638 +       ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS, 
     2650+       ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS, 
    26392651+               &ar2315_eth_data); 
    26402652+       ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS); 
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