Ignore:
Timestamp:
2011-11-12T11:54:08+01:00 (5 years ago)
Author:
juhosg
Message:

ar71xx: fix AR934X clock frequency calculation

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h

    r28705 r28973  
    213213 
    214214#define AR934X_PLL_REG_CPU_CONFIG       0x00 
     215#define AR934X_PLL_REG_DDR_CONFIG       0x04 
    215216#define AR934X_PLL_REG_DDR_CTRL_CLOCK   0x8 
    216217 
     
    372373 
    373374#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL_RESET        1 
     375 
     376#define AR934X_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS          BIT(2) 
     377#define AR934X_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS          BIT(3) 
     378#define AR934X_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS          BIT(4) 
     379#define AR934X_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL      BIT(20) 
     380#define AR934X_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL      BIT(21) 
     381#define AR934X_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL      BIT(24) 
    374382 
    375383extern void __iomem *ar71xx_pll_base; 
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