Changeset 35037


Ignore:
Timestamp:
2013-01-07T15:30:37+01:00 (3 years ago)
Author:
juhosg
Message:

ar71xx: disable PHY_SWAP and PHY_ADDR_SWAP bits on TL-WR703N/MR3020/MR3040/MR11U boards

The PHY_SWAP and PHY_ADDR_SWAP bits are initialized
differently by different versions of the bootloader.
This leads to broken ethernet connection with OpenWrt
on some boards.

Turn both SWAP bits OFF on these boards to make it
consistent regardless of the bootloader used.

Based on a patch by Michel Stempin <michel.stempin@…>.

Signed-off-by: Gabor Juhos <juhosg@…>

Location:
trunk/target/linux/ar71xx/files/arch/mips/ath79
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c

    r34087 r35037  
    8686        u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); 
    8787 
    88         ath79_setup_ar933x_phy4_switch(false, true); 
     88        /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ 
     89        ath79_setup_ar933x_phy4_switch(false, false); 
    8990 
    9091        ath79_register_m25p80(&tl_mr11u_flash_data); 
     
    9899        ath79_register_mdio(0, 0x0); 
    99100        ath79_register_eth(0); 
    100         ath79_eth0_data.phy_mask = BIT(0); 
    101101 
    102102        ath79_register_wmac(ee, mac); 
  • trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c

    r34087 r35037  
    101101        u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); 
    102102 
    103         ath79_setup_ar933x_phy4_switch(false, true); 
     103        /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ 
     104        ath79_setup_ar933x_phy4_switch(false, false); 
    104105 
    105106        ath79_register_m25p80(&tl_mr3020_flash_data); 
     
    119120        ath79_register_mdio(0, 0x0); 
    120121        ath79_register_eth(0); 
    121         ath79_eth0_data.phy_mask = BIT(0); 
    122122        ath79_register_wmac(ee, mac); 
    123123} 
  • trunk/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c

    r34087 r35037  
    6363        u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); 
    6464 
     65        /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ 
     66        ath79_setup_ar933x_phy4_switch(false, false); 
     67 
    6568        ath79_register_m25p80(&tl_wr703n_flash_data); 
    6669        ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), 
Note: See TracChangeset for help on using the changeset viewer.