source: trunk/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c

Revision Log Mode:


Copied or renamed
Diff Rev Age Author Log Message
(edit) @20494   7 years nbd ar71xx: add support for ar7241 and ar7242
(edit) @20286   7 years juhosg ar71xx: optimize register access in irq.c
(edit) @20281   7 years juhosg ar71xx: move PCI intterupt handling code to pci-ar7{1xx,24x}.c
(edit) @20280   7 years juhosg ar71xx: use set_irq_chained_handler for the PCI IRQs
(edit) @20279   7 years juhosg ar71xx: merge AR71XX_IRQ_CPU_{PCI,WMAC} into AR71XX_IRQ_CPU_IP2
(edit) @20150   7 years nbd ar71xx: fix oprofile support
(edit) @20007   7 years juhosg ar71xx: don't init PCI irqs on the AR7240 if the PCIe subsystem are in …
(edit) @17142   8 years juhosg [ar71xx] oops, add missing semicolons
(edit) @17141   8 years juhosg [ar71xx] get rid of some ifdefs in the IRQ code
(edit) @17098   8 years juhosg [ar71xx] fix MISC IRQ handling on the AR7240
(edit) @16736   8 years juhosg [ar71xx] make irq_chip definitions static
(edit) @16734   8 years juhosg [ar71xx] AR7240 requires different IRQ unmasking code
(edit) @16701   8 years juhosg [ar71xx] add missing break statement
(edit) @16669   8 years juhosg [ar71xx] fix AR7240 PCI IRQ support
(edit) @16646   8 years juhosg [ar71xx] initialize IRQs for the AR7240 SoC
(edit) @16415   8 years juhosg [ar71xx] flush more register writings
(edit) @16372   8 years juhosg [ar71xx] flush AR71XX_RESET_PCI_INT_ENABLE register after writing
(edit) @16358   8 years juhosg [ar71xx] handle PCI_CORE interrupt as well
(edit) @15245   8 years nico remove 'svn:keywords' property, not needed anymore after [15242]
(edit) @13736   8 years juhosg [ar71xx] use SoC specific irq dispatch code
(edit) @13516   8 years juhosg [ar71xx] rename reset register definitions
(add) @11894   9 years juhosg surprise :p
Note: See TracRevisionLog for help on using the revision log.